1. Field of the Invention
The present invention relates to a system and method for direct to archive data storage.
2. Background Art
Conventional data file storage systems use Hierarchical Storage Management/Manager (HSM) to move data from one storage class (i.e., category, type, etc.) to another as the information ages. Data is initially stored in a memory that has a high reliability and access performance rating because the data is only stored at that memory. Predetermined policy decisions dictate the size of memory, the level of memory performance for reliability and for access time, and the length of time that data is stored at a particular level of memory. After the predetermined time has expired, data is transferred from high performance memory to successively lower performance memory. The successively lower performance memories are typically successively larger sized memories.
Referring to FIG. 1, a diagram of a conventional data storage system 10 is shown. The data storage system 10 includes a memory 12 (e.g., MEMa), a memory 14 (e.g., MEMb), a memory 16 (e.g., MEMc), and a memory 18 (e.g., MEMn). The memories 12, 14, 16, and 18 generally have decreasing performance requirements, increasing aging criteria, and increasing capacities. For example, in an example of a typical conventional data storage system, information (e.g., DATA) is stored in the memory 12 (e.g., as DATAa) for five days and when the data has aged five days in the memory 12, the data (e.g., DATAa) is transferred to the memory 14 (e.g., stored as DATAb). When the data has aged 50 days in the memory 14, the data (e.g., DATAb) is transferred to the memory 16 (e.g., stored as DATAc). When the data has aged 500 days in the memory 16, the data (e.g., DATAc) is transferred to the memory 18. Information that is stored in the memory 18 can be held for 5,000 days or longer.
The performance of the memories 12, 14, 16, and 18 may be normalized and rated for performance to last byte on a generally logarithmic scale where increased speed of access and data transfer (e.g., inverse of access and data transfer time) is plotted. For example, the memory 12 may be a memory having an extremely rapid information access and transfer (i.e., extremely short information access and transfer time) and a performance rating of 10-100. The memory 14 may be a memory having a rapid information access and transfer (i.e., short information access and transfer time) and a performance rating of 1-10. The memory 16 may be a memory having a slow information access and transfer (i.e., slow information access and transfer time) and a performance rating of 0.1-1. The memory 18 may be a memory having a very slow information access and transfer (i.e., very slow information access and transfer time) and a performance rating of up to 0.1.
The size (i.e., storage capacity) of the memories 12, 14, 16, and 18 is typically matched to the amount of data that is expected to be stored by a user during the duration of the time interval for the memory. For example, the memory 12 can be a 5 TB memory, the memory 14 can be a 45 TB memory, the memory 16 can be a 450 TB memory, and the memory 18 can be a 5 PB memory.
Data stored at a particular memory for a predetermined duration of time and is transferred to the next successively lower performance memory as the data ages (becomes stale). For example, after the data has aged 5 days the data is transferred from memory 12 to memory 14, after the data has aged 50 days the data is transferred from memory 14 to memory 16, after the data has aged 500 days the data is transferred from memory 16 to memory 18. Each successive transfer of data has a potential for introduction of errors that are not detected by error correction measures. Errors that are introduced can be transferred without detection to successive lower stages of memory.
Thus there exists an opportunity and need for an improved system and method for a data storage systems that addresses the deficiencies in conventional data storage system approaches.